1. Field
Embodiments of the invention relate generally to a nonvolatile memory device and a method for manufacturing a nonvolatile memory device.
2. Background Art
A NAND nonvolatile memory device using a transistor faces a difficulty in device operations due to what is called “short channel effects” accompanying the miniaturization of the device. The “short channel effects” are phenomena that occur due to a short distance between the source portion and the drain portion caused by the miniaturization of the device, such as an increased leak current between the source and the drain. Therefore, the development of memory devices that take the place of the memory device using a transistor is desirable. As one of those devices, a nonvolatile memory device (resistance change memory, ReRAM) is investigated that utilizes the property that applying an electric field pulse to a transition metal insulating film and the like changes the resistance of the substance (refer to JP-A 2007-149170 (Kokai), for example).
Currently, a crosspoint nonvolatile memory device (resistance change memory) is investigated in which a memory layer is disposed at the intersection of a bit line and a word line. Such a device is allowed to have theoretically a cell area of 4F2 (where “F” is the design rule (the minimum design dimension)), which is equal to that of the NAND nonvolatile memory device. Furthermore, the nonvolatile memory device (resistance change memory) of such a configuration has also the advantage that the integration degree can be further improved by stacking a large number of stacked bodies that include memory layers.
Here, if the cross-sectional dimension of the memory layer in the direction substantially perpendicular to the stack direction varies between stacked layers, switching characteristics may vary between the layers. Therefore, a stacked body having a rectangular parallelepiped shape is formed so that components (e.g. a memory layer, a rectifying element, etc.) of the stacked body may have an equal cross-sectional dimension (refer to FIG. 12 and FIG. 13 of JP-A 2007-149170 (Kokai), for example).
In this case, for example, in order to achieve low power, the memory layer preferably has a small cross-sectional dimension in the direction substantially perpendicular to the stack direction. On the other hand, in order to reduce the load of the rectifying element, the rectifying element preferably has a large cross-sectional dimension in the direction substantially perpendicular to the stack direction.
Therefore, if the stacked body is configured to have a uniform cross-sectional dimension in the direction substantially perpendicular to the stack direction, future improvements may be difficult in electrical characteristics of the nonvolatile memory device (resistance change memory, ReRAM).